trap cleanup
IRQ_OFFSET -> T_IRQ0 (a trap number not an IRQ number) T_SYSCALL 0x30 -> 0x40 (move out of IRQ range)
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					 3 changed files with 7 additions and 7 deletions
				
			
		
							
								
								
									
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								ioapic.c
									
										
									
									
									
								
							
							
						
						
									
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								ioapic.c
									
										
									
									
									
								
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					@ -62,7 +62,7 @@ ioapicinit(void)
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  // Mark all interrupts edge-triggered, active high, disabled,
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					  // Mark all interrupts edge-triggered, active high, disabled,
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  // and not routed to any CPUs.
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					  // and not routed to any CPUs.
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  for(i = 0; i <= maxintr; i++){
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					  for(i = 0; i <= maxintr; i++){
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    ioapicwrite(REG_TABLE+2*i, INT_DISABLED | (IRQ_OFFSET + i));
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					    ioapicwrite(REG_TABLE+2*i, INT_DISABLED | (T_IRQ0 + i));
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    ioapicwrite(REG_TABLE+2*i+1, 0);
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					    ioapicwrite(REG_TABLE+2*i+1, 0);
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  }
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					  }
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}
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					}
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					@ -76,6 +76,6 @@ ioapicenable(int irq, int cpunum)
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  // Mark interrupt edge-triggered, active high,
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					  // Mark interrupt edge-triggered, active high,
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  // enabled, and routed to the given cpunum,
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					  // enabled, and routed to the given cpunum,
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  // which happens to be that cpu's APIC ID.
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					  // which happens to be that cpu's APIC ID.
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  ioapicwrite(REG_TABLE+2*irq, IRQ_OFFSET + irq);
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					  ioapicwrite(REG_TABLE+2*irq, T_IRQ0 + irq);
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  ioapicwrite(REG_TABLE+2*irq+1, cpunum << 24);
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					  ioapicwrite(REG_TABLE+2*irq+1, cpunum << 24);
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}
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					}
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										6
									
								
								lapic.c
									
										
									
									
									
								
							
							
						
						
									
										6
									
								
								lapic.c
									
										
									
									
									
								
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					@ -52,14 +52,14 @@ lapicinit(int c)
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    return;
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					    return;
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  // Enable local APIC; set spurious interrupt vector.
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					  // Enable local APIC; set spurious interrupt vector.
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  lapicw(SVR, ENABLE | (IRQ_OFFSET+IRQ_SPURIOUS));
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					  lapicw(SVR, ENABLE | (T_IRQ0 + IRQ_SPURIOUS));
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  // The timer repeatedly counts down at bus frequency
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					  // The timer repeatedly counts down at bus frequency
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  // from lapic[TICR] and then issues an interrupt.  
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					  // from lapic[TICR] and then issues an interrupt.  
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  // If xv6 cared more about precise timekeeping,
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					  // If xv6 cared more about precise timekeeping,
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  // TICR would be calibrated using an external time source.
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					  // TICR would be calibrated using an external time source.
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  lapicw(TDCR, X1);
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					  lapicw(TDCR, X1);
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  lapicw(TIMER, PERIODIC | (IRQ_OFFSET + IRQ_TIMER));
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					  lapicw(TIMER, PERIODIC | (T_IRQ0 + IRQ_TIMER));
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  lapicw(TICR, 10000000); 
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					  lapicw(TICR, 10000000); 
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  // Disable logical interrupt lines.
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					  // Disable logical interrupt lines.
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					@ -72,7 +72,7 @@ lapicinit(int c)
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    lapicw(PCINT, MASKED);
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					    lapicw(PCINT, MASKED);
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  // Map error interrupt to IRQ_ERROR.
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					  // Map error interrupt to IRQ_ERROR.
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  lapicw(ERROR, IRQ_OFFSET+IRQ_ERROR);
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					  lapicw(ERROR, T_IRQ0 + IRQ_ERROR);
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  // Clear error status register (requires back-to-back writes).
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					  // Clear error status register (requires back-to-back writes).
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  lapicw(ESR, 0);
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					  lapicw(ESR, 0);
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								picirq.c
									
										
									
									
									
								
							
							
						
						
									
										4
									
								
								picirq.c
									
										
									
									
									
								
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					@ -45,7 +45,7 @@ picinit(void)
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  outb(IO_PIC1, 0x11);
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					  outb(IO_PIC1, 0x11);
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  // ICW2:  Vector offset
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					  // ICW2:  Vector offset
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  outb(IO_PIC1+1, IRQ_OFFSET);
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					  outb(IO_PIC1+1, T_IRQ0);
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  // ICW3:  (master PIC) bit mask of IR lines connected to slaves
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					  // ICW3:  (master PIC) bit mask of IR lines connected to slaves
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  //        (slave PIC) 3-bit # of slave's connection to master
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					  //        (slave PIC) 3-bit # of slave's connection to master
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					@ -63,7 +63,7 @@ picinit(void)
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  // Set up slave (8259A-2)
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					  // Set up slave (8259A-2)
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  outb(IO_PIC2, 0x11);                  // ICW1
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					  outb(IO_PIC2, 0x11);                  // ICW1
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  outb(IO_PIC2+1, IRQ_OFFSET + 8);      // ICW2
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					  outb(IO_PIC2+1, T_IRQ0 + 8);      // ICW2
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  outb(IO_PIC2+1, IRQ_SLAVE);           // ICW3
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					  outb(IO_PIC2+1, IRQ_SLAVE);           // ICW3
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  // NB Automatic EOI mode doesn't tend to work on the slave.
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					  // NB Automatic EOI mode doesn't tend to work on the slave.
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  // Linux source code says it's "to be investigated".
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					  // Linux source code says it's "to be investigated".
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